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I'm trying to think of what are some neat computer architectures out there.

Chuck Moore's "Green Arrays" is kinda cool and so is the Parallela board.



Transputer. Hardware multitasking and link-communication and a very compact instruction set.

https://en.wikipedia.org/wiki/Transputer

https://en.wikipedia.org/wiki/XCore_Architecture

SOAR (Smalltalk On A RISC), though the conclusion there was mostly that a plain old RISC will do. I wonder if that is still true today.

Rekursiv OO computer https://en.wikipedia.org/wiki/Rekursiv

NEC dataflow processor. https://books.google.de/books?id=qRrlBwAAQBAJ&pg=PA152&lpg=P...


Never heard of SOAR. It would be pretty sweet though to have a powerful & multi-core chip running a Smalltalk OS that could do something with all the cores. I'd also like to see kOS from Arthur Whitney if he ever finishes it, although I'd never be able to afford any of their products.


https://www2.eecs.berkeley.edu/Pubs/TechRpts/1986/CSD-86-287...

https://www.deepdyve.com/lp/association-for-computing-machin...

http://digitalassets.lib.berkeley.edu/techreports/ucb/text/E...

Looking at the results, they say that hardware tag-checking for integer arithmetic and register windows for fast method calls were the two most important features of the design, nearly doubling performance.

I wonder if that still holds today, with the memory wall so dominant that CPUs tend to be stalled quite a bit (therefore enough time to do tag checking in software).


Nowadays the thinking seems to be that register windows were a mistake (e.g. in SPARC), and newer designs such as RISC-V or Aarch64 don't do it.


I don't think I'd call the transputer "hardware multitasking" so much as "integrated communications network."

For a time the T800 was the top of the FP pile. Not for long, though, and then the long, long, long wait for the disappointing T9k doomed the whole architecture.


>I don't think I'd call the transputer "hardware multitasking"

"A Transputer had a number of simple operating system functions built into the hardware. These included hardware multitasking with foreground and background priority levels, hardware timers, and hardware time-slicing of background tasks."

The Hardware and Software Architecture of the Transputer -- https://archive.org/details/Xputer

There are special instruction to start and end a process, and the fact that it was a stack machine means context switches were extremely fast, almost no registers to save/restore.

> so much as "integrated communications network."

It had both, and both were integrated. IIRC, the instructions to send/receive on the links were integrated with the multitasking hardware.

"The first 16 'secondary' zero-operand instructions (using the OPR primary instruction) were:

   Mnemonic Description
   REV      Reverse – swap two top items of register stack
   LB       Load byte
   BSUB     Byte subscript
   ENDP     End process
   DIFF     Difference
   ADD      Add
   GCALL    General Call – swap top of stack and instruction pointer
   IN       Input – receive message
   PROD     Product
   GT       Greater Than – the only comparison instruction
   WSUB     Word subscript
   OUT      Output – send message
   SUB      Subtract
   STARTP   Start process
   OUTBYTE  Output byte – send one-byte message
   OUTWORD  Output word – send one-word message"
https://en.wikipedia.org/wiki/Transputer

Also, you could designate memory locations as local communications channels, and the same instructions would work. So the same binary could run locally or distributed.


This manual is a great find! Thank you.


I need a group for this .. I love forth array cpus


I just wish I could figure out how to use the green arrays




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