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Die size isn't really about packing more cores into a CPU. it's about packing more CPUs on a wafer. The material cost is the largely the same. Smaller die sizes are about your quality control with masks and deposits.

Given a 300mm diameter wafer and a 10mm square CPU die at 14nm you get about 700 CPUs per wafer (Pi * diameter * diameter) / (4 * die * die) (https://en.wikipedia.org/wiki/Wafer_(electronics)#Analytical...). If you change that 10mm CPU to 10nm, you'll have about a 7.2mm square CPU die. That's nearly 1400 CPUs per wafer. Even if you get 100% of CPUs from the 14nm die, once your yield hits 50% on 10nm the 10nm process produces more for the same cost. Now you can either reap the profits, or reduce costs.



I'm no expert, but isn't there another technique in play as well?

As you get smaller you can duplicate CPU components to make your chip fabrication more robust against errors. If a component is faulty on the die, the CPU can be patched to use the other (identical) component.


The Cell did that. They really had 9 Cell processors on the chip, but only 8 of them were enabled on any given PS3.

Patching at a lower level has been tried, but it's usually more trouble in manufacturing than it's worth. There's a long history of workarounds for low yield, but the fab industry has usually been able to fix the fab problems and get the yield up.

Except for memory devices, where patching out bad columns is standard.


You're off by 1 there, there were 8 SPU's on a Cell chip, 1 was disabled to account for manufacturing defects, and another was reserved for exclusive use of the O. Leaving the developer with 6 SPU's to use.


I think he's including the PPE in his count of 9 processors.


Unfortunately, you end up having to make the interconnects longer to accommodate the additional redundant components, which ends up slowing everything down.

It's a tradeoff that's not always worth it.


This is done in quite a few places including GPUs.


That only works for things like on-board SRAM




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