No, but they can skip the socket, much like many of the mini-pcs/SFFs that include laptop chips in small desktops. Strix halo already doubled the memory channels and the next gen is supposedly going to move the memory bus from 256 bits wide to 384 bits.

The "insane" RAM bandwidth makes sense with Apple M chips and Strix Halo because it's actually "crap" VRAM bandwidth for the GPU. What makes those nice is the quantity of memory the GPU has (even though its slow), not that the CPU has tons of RAM bandwidth.

When you go to the desktop it becomes harder to justify including beefed up memory controllers just for the CPU vs putting that towards beefing some other part of the CPU up that has more of an impact in cost or performance.

Yeah the only use of the large bandwith in Apple Silicon is for the GPU. I'm always amazed by the fanboys who keep hyping this trope.

Even when feeding all cores, the max bandwith used by the CPU is less than 200GB/s, in fact it is quite comparable to Intel/AMD CPUs and even less than their high-end ones (x86 still rules on the multi-core front in any case).

I actually see this as a weakness of Apple Silicon, because it doesn't scale that well. It's basically the problem of their Ultra chip: doesn't allow doubling of the compute and doesn't allow faster RAM bandwith, you only get higher RAM capacity in exchange for slower GPU compute.

They just scaled up their mobile architecture and it has its limit.

Not easily, and you will need a new motherboard anyhow because each of the 2 slots you can have per lane are wired in tandem.

The socket io locks in the amount of memory channels. Some pins could be repurposed but that's pretty much a new socket anyway.

They could in theory do on package dram as faster first level memory, but I doubt we'll see that anytime soon on desktop and it probably wouldn't fit under the heat spreader

They already do the latter with X3D.

You won’t be able to add RAM to the die itself there no room on the interposer really.

> Can they double the memory lanes without switching socket?

Sure. Keep the DIMM sockets and add HBM to the CPU package.

Actually probably the best possible architecture. You can choose to have both or only one, backward compatible and future proof.

Yes, it adds another level to the memory hierarchy but that can be fine tuned.

It’s really not that simple, the unpopulated memory slots will cause havoc with signal integrity 4 slot boards already suffer from this.

You are also overestimating how much room there is on the interposer.

As someone with a 9950x3d with direct die cooling setup I can tell you there is no room.