The limitations of x86 perf. counters for deterministic replay have been known far earlier than 2021; in industry around 2005 or so. It would be nice if there were more efficient hardware support for determinism, especially multi-core.
It's quite intriguing that x86-64 processors of different microarchitectures and from different vendors basically all have similar non-determinsm for retired instruction counters but — at least in the authors’ brief review — IA64 (Itanium), POWER, and SPARC appear to be too deterministic.
I can't really see any good explanation for why this would be hard to get right specifically on x86-64. Can anyone else?
(And are there any more recent or thorough results on other archs, particularly arm64?)
