Nit pick: SRAM is not built out of flip flops. It's carefully sized inverters and a whole lot of analog magic (writing a bit involves overpowering the inverters of the bit with larger drivers). You may be thinking of latch arrays.
The overpowering of the inverters is just an area efficient trick to make gates (the so-called wired-OR or wired-AND).
The SRAM memory cells are simpler than flip flops, they are just S-R latches (i.e. equivalent with a half of an M-S flip-flop) made from two gates (either NAND or NOR).
In any technology where static gates are possible SRAM memories are also possible.
However there are technologies where only dynamic gates are possible, i.e. gates that provide an output that is valid only during a clock pulse and which cannot remain valid indefinitely. Only in such technologies you cannot make SRAMs, but you can still make dynamic memories, which must consume energy all the time, for refreshing their content.
All the "analog magic" that you mention has only the purpose of making an SRAM array much denser than when implemented with the standard gates of a technology, but an implementation with standard gates is always possible and it may be chosen for certain register files, where high speed may be more important than the occupied area.
